multipliers英文

准确;FPGA field-programmable gate array integrated and complex as the highest level of programmable ASIC. Is a new type of ASIC categories, it built on innovative ideas and the invention of advanced EDA technology. Calculators, multipliers, digital filter, such as two-dimensional convolution with a complex algorithm logic unit and signal processing modules can be used FPGA logic design to achieve. To the Xilinx FPGA devices as an example, the structure can be divided into three parts: programmable logic block CLB (Configurable Logic Blocks), a programmable I / O modules IOB (Input / Output Block) and programmable internal link PI (Programmable Interconnect). CLB order for the device in the array around the ring internal connections, IOB distribution in the surrounding pins. Xilinx strong function of the CLB, not only to achieve logic function can also be configured as RAM in the form of the complex. Field programmable gate arrays containing large-scale FPGA is a universal digital circuit devices. These digital circuits between Internet users is the use of more advanced software to definition. FPGA can be unlimited duplication of programming, from one circuit to another circuit changes through simple uninstall Internet document to achieve, and has greatly accelerated the complex digital circuit design, thus shortening the troubleshooting time. Traditional digital logic design using TTL level and small-scale digital integrated circuits to complete the logic circuit. Use these standards logic device has been proven to be the cheapest means, but do some cabling requirements and complex integrated circuit board (welding debugging), if there is wrong, especially with changes in trouble. Thus, the application of traditional electronic design large part of the programme mainly concentrated in the physical connection between the device equipment, debugging and troubleshooting areas. It is precisely because of FPGA EDA technology uses a more advanced computer language, the circuit is basically generated by the computer to complete, will enable users to quickly complete the more complex digital circuit design, in the absence of physical connections between devices, debugging and troubleshooting more rapid and effective.

multiplier的中文翻译是乘数

词语分析：

音标：英 [ˈmʌltɪplaɪə(r)]   美 [ˈmʌltɪplaɪər]

n. 乘数

短语：

multiplier effect 乘数效应

frequency multiplier [电子]倍频器

例句：

Multiplier theory gives us some methods for the analysis of the paper.

乘数理论为该问题的分析提供了思路与方法。

An Empirical Analysis of the Stability of the Money Multiplier in China.

我国货币乘数稳定性的实证分析。

The emerging of electronic money influences the money definition and money multiplier.

电子货币的产生影响着货币定义及货币乘数。

近义词：

n. 乘数  multiplicator

The internal architecture of the proposed FPGA-based servo control IC for PMSM drive is shown in Fig.2. The FPGA chip is manufactured by Altera Corporation and it can be embedded by a Nios processor. The FPGA used in this paper is Cyclone EP1C20, which has 20,060 LEs, maximum 301 user I/O pins, total 294,912 RAM bits, and a Nios embedded processor which has a 16-bit or 32-bit configurable CPU core, 1 to 20Kbytes available on chip and maximum 4G bytes off-chip memory. A custom software development kit (SDK) consists of a compiled library of software routines for the SoPC design, a Make-file for rebuilding the library, and C header files containing structures for each peripheral. In Fig.2, the proposed FPGA-based control IC has two IPs, a Nios embedded processor IP and an application IP. The Nios processor is used to perform the AFC function of PMLSM drive and its flow chart of interrupt service routine (ISR) for intelligent AFC are plotted in Fig. 3. The controller program is coded in C language. The application IP for current vector control of PMLSM in Fig.2 is implemented by hardware using PLD due to the need of high-speed but simple computation and it includes frequency divider, circuits of two PI controllers, coordinate transformation of Clarke, Park, inverse Park, inverse Clarke and circuits of SVPWM, QEP and ADC conversion control. Figure 4 shows the digital circuit of PI controller, which includes 3 adders, 2 multipliers, 2 D-type flip-flops and 3 max value limiters. Figures 5 to 6 are the circuits of Clark-1 and Park-1 transformation in (8) and (10), respectively. The block diagram of PWM circuit is shown in Fig. 7. PWM circuit is designed to be 12 kHz frequency and 1µs dead-band. The overall circuits included a Nios embedded processor IP (25.7%) and an application IP (28.2%) in Fig. 2, use 53.9% utility of Cyclone EP1C20.

FPGA field-programmable gate array integrated and complex as the highest level of programmable ASIC. Is a new type of ASIC categories, it built on innovative ideas and the invention of advanced EDA technology. Calculators, multipliers, digital filter, such as two-dimensional convolution with a complex algorithm logic unit and signal processing modules can be used FPGA logic design to achieve. To the Xilinx FPGA devices as an example, the structure can be divided into three parts: programmable logic block CLB (Configurable Logic Blocks), a programmable I / O modules IOB (Input / Output Block) and programmable internal link PI (Programmable Interconnect). CLB order for the device in the array around the ring internal connections, IOB distribution in the surrounding pins. Xilinx strong function of the CLB, not only to achieve logic function can also be configured as RAM in the form of the complex. Field programmable gate arrays containing large-scale FPGA is a universal digital circuit devices. These digital circuits between Internet users is the use of more advanced software to definition. FPGA can be unlimited duplication of programming, from one circuit to another circuit changes through simple uninstall Internet document to achieve, and has greatly accelerated the complex digital circuit design, thus shortening the troubleshooting time. Traditional digital logic design using TTL level and small-scale digital integrated circuits to complete the logic circuit. Use these standards logic device has been proven to be the cheapest means, but do some cabling requirements and complex integrated circuit board (welding debugging), if there is wrong, especially with changes in trouble. Thus, the application of traditional electronic design large part of the programme mainly concentrated in the physical connection between the device equipment, debugging and troubleshooting areas. It is precisely because of FPGA EDA technology uses a more advanced computer language, the circuit is basically generated by the computer to complete, will enable users to quickly complete the more complex digital circuit design, in the absence of physical connections between devices, debugging and troubleshooting more rapid and effective.

“multiplier”翻译成中文是“乘数；倍增器；增加者；繁殖者”

一、音标：

英 [ˈmʌltɪplaɪə(r)]  美 [ˈmʌltɪplaɪər]

二、释义：

n. [数] 乘数；[电子] 倍增器；增加者；繁殖者

三、同近义词：

四、短语：

Lagrange multiplier 拉格朗日乘子 ; 拉格朗日乘数法 ; Lagrange乘子

electron multiplier 电子倍增管 ; [电子] 电子倍增器

frequency multiplier [电子] 倍频器 ; [电子] 频率倍增器 ; 倍频器频率倍增器

multiplier effect 乘数效应 ; 倍数作用 ; 乘数效果 ; 延增效应

Megapixel Multiplier Rule 像素翻倍法则 ; 像素翻倍规律 ; 像素翻倍规则 ; 像荤翻倍法则

voltage multiplier [电子] 倍压器 ; 电压倍增器倍压器 ; [电子] 电压倍增器 ; 电压乘法器

image multiplier 影像倍增器 ; 像伯增器 ; [电子] 图像倍增器 ; 图像漂移

multiplier tube [电子] 倍增管

Port Multiplier 端口倍增器 ; 端口多路器 ; 连接埠倍增器 ; 端口倍增

五、例句：